DRV8711 Clear condition of SDT/SDTLAT bit and stall counter

Hi,

I am making a Japanease document about "DRV8711 Stall detection function" for my customer.
But I don't undserstanding about Clear condition of SDT/SDTLAT bit and stall counter.
Could you answer the below questions, please?

At Internal stall detection

Q1: Datasheet shows below words at 7.3.10.1 Internal Stall Detection.
"The STDLAT is reset when the STD bit clears
after the first zero-cross step that does not detect a stall condition."
What is the meaning of the "first zero-cross"?

Q2: When STD bit is cleared, Is stall counter cleared, too?
stall counter means below.

At External stall detection

Q3: Does stall counter operate at using External stall detection?

Best regards,
Shimizu