Quantcast
Channel: Motor drivers forum - Recent Threads
Viewing all articles
Browse latest Browse all 15405

DRV8432: DRV8432 driving 2 TEC

$
0
0

Part Number:DRV8432

Hi TI experts,

We are using DRV8432 to drive 2 TECs seperately, which should support both heating and cooling.  In our design, DRV8432 is set in mode 1(M1=M2=M3=0), dual full bridges with cycle-by-cycle current limit.

That means, PWM_A and PWM_B will drive the 1st full H-bridge, and PWM_C and PWM_D will drive the 2nd full H-bridge. Right?

But there is no detailed information about the full H-bridges in the datasheet. Is one full H-bridge consist of 2 N-channel MOSFET and 2 P-channel MOSFET?

The reason for this is, I'm not clear about how to drive PWM_A and PWM_B. For my understanding:

If PWM_A =1 and PWM_B = 0, TEC will work (for example) in heating mode;

If PWM_A =0 and PWM_B =1, TEC will work in cooling mode;

If PWM_A =0 and PWM_B = 0(Or PWM_A =1 and PWM_B =1), TEC will not work.  Am I correct?

If so, I can just PWM-ing PWM_A and drive PWM_B low to control the heating level. But after checking other threads, it seems that one small pulse should appear on PWM_B in every period to charge bootstrap cap. Is it correct?

And if so, what is the right time slot for the pulse on PWM_B? At the same time when PWM_A goes to high? Or when PWM_A goes to low?  Do you have any diagram/picture to illustrate this?

And I also see in some applications, PWM_B is complementary of PWM_A. What is this for? This makes me confused a lot.

Thanks in advance.

BR,

Jon


Viewing all articles
Browse latest Browse all 15405

Trending Articles



<script src="https://jsc.adskeeper.com/r/s/rssing.com.1596347.js" async> </script>