DRV8303 SPI bus read question

I am looking at the data sheet for the DRV8303.  On page 17 the data sheet says

"  For a read command (Nth cycle) in SPI, SP0 will send out data in the register with address in read command in next cycle (N+1).    "  

 My comment:  This seems to say that to read the device you issue a read command to the DRV8303 over the SPI bus and on the next SPI bus cycle  to the device   the data from  the previous read command will be sent out.  This next cycle could be a write command  or another read command.  

Then on page 18 of the data sheet I find : 

"Read / Write Bit

.....    ; when W0 = 1,   input data is a read command, and the register value will send out on the SAME  word cycle from SDO from D10 to D0.   "   (Capital letters added)

This seems to say that when W0=1 indicating a read command the data for that read command will be sent out on  the SAME  word cycle on bits D10 through D0.

So my questions are

1. When  I send the read command,  which SPI bus cycle do I get the results,  the SAME cycle or the next (N+1) cycle?

2.  On  a read command what should the data I send to the device be? The page 18 excerpt just says that on a read command the " input data is a read command".  What does this mean?

3.  On the very first SPI bus access to the device after power up  what data does the device send out?

Thank you